Efficiency of a Combined Protection Method against Correlation
Keywords:
physical security, protection, hardware, side attack, chaos, control signal, security evaluationAbstract
We analyze the eciency of the masking of instruction patterns using a chaotic driven clock and power supply, in front of a side attack intruding the power supply of a microsystem. The differential analysis is supposedly conducted by correlation power analysis. We demonstrate that the use of a chaotically-driven masking based on relatively simple circuits may be a signicant candidate for the protection of embedded systems.
References
P. Kocher, J. Jae, B. Jun, (1998), Introduction to Dierential Power Analysis and Related Attacks, Cryptography Research Inc, www.cryptography.com/public/pdf/DPATechInfo.pdf. Accessed Jan. 2012.
P. Kocher, J. Jae, B. Jun, (2000), Dierential Power Analysis, Cryptography Research Inc, www.cryptography.com/public/pdf/DPA.pdf. Accessed Jan. 2012.
V. Tiwari, S. Malik, A. Wolfe, M. T.-C.Lee, Instruction Level Power Analysis and Optimiza- tion of Software. J. VLSI Signal Processing, Vol. 13, No. 2-3, Aug. 1996, pp. 223-238. http://dx.doi.org/10.1007/BF01130407
R. Newell, F. Juliano, Protecting Sensitive Networked Embedded Systems from Aggressive Intrusion. EDN, Electronic Design News Magazine, May 5, 2013. www.edn.com/Pdf/ViewPdf?contentItemId=4413418
T.-H. Le, M. Berthier, Mutual Information Analysis under the View of Higher-Order Statis- tics. In: Echizen, I., Kunihiro, N., Sasaki, R., (Eds.), Advances in Information and Computer Security, LNCS Vol. 6434, 2010, pp. 285-300, Springer, Berlin Heidelberg, pp. 285-300 http://dx.doi.org/10.1007/978-3-642-16825-3_19
H.-N. L. Teodorescu, E.-F. Iftene, Analysis of the Code Masking Eciency of Chaotic Clocks in Microcontroller Applications, Proc. ISEEE 2010, pp. 261-266.
E.-F. Iftene, H.-N. L. Teodorescu, Masking the Instructions of a Microcontroller using a `Chaotic' Power Supply, Bull. Polytechnic Inst. Iasi, E&E, LIX (LXIII), 1, 2013, pp. 21-28.
E.-F. Iftene, H.-N. L. Teodorescu, Protecting the Code against Side Attacks using Chaotically Controlled Clock and Supply. Proc. ECAI 2013 - 5th Int. Conf. Electronics, Computers and A.I., IEEE Conf. #20924, 27-29 June 2013, Pitesti, Romania, pp. 79-82.
H.-N.L. Teodorescu, V. P. Cojocaru, Complex Signal Generators based on Capacitors and on Piezoelectric Loads. In: C. H. Skiadas, I. Dimotikalis and C. Skiadas (Eds), Chaos Theory: Modeling, Simulation and Applications. 2011, World Scientic Publishing Co., pp. 423-430.
E. Brier, C. Clavier, F. Olivier, Correlation Power Analysis with a Leakage Model. In M. Joye and J.J. Quisquater (Eds.), Cryptographic Hardware Embedded System, CHES 2004, Vol. 3156, LNCS, pp. 16-29, Springer-Verlag, 2004.
Y. Zhang, A. Juels, M.K. Reiter, T. Ristenpart, Cross-VM Side Channels and Their Use to Extract Private Keys. ACM, 2012. http://dx.doi.org/10.1145/2382196.2382230.
R.E. Atani, S. Mirzakuchaki, S.E. Atani, W. Meier, On DPA-Resistive Implementation of FSR-based Stream Ciphers using SABL Logic Styles, International Journal of Computers Communications & Control, ISSN 1841-9836, Vol. 3 (4), pp. 324-335, 2008.
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